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Author Topic: Bug ? [vsqrtss xmmreg,xmmreg,mem128] invalid combination of opcode and operand  (Read 2710 times)

Nitorami

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I get an error message on compiling this bit of code. Windows10 & 7, FPC 3.0.4.  Can anybody test and confirm this please ? Seems to be a problem with AVX instruction set and optimisation for register variables. CPU-Z reports that my machine supports the AVX instruction set, so I suspect this is a bug.

Compile with: fpc mist.pas -CfSSE2 -CpCOREAVX -Mobjfpc -O2 -Twin32

Code: Pascal  [Select][+][-]
  1. //fpc mist.pas -CfSSE2 -CpCOREAVX -Mobjfpc -O2 -Twin32
  2.  
  3. type float = single;
  4.      TVector = array of float;
  5.      TMatrix = array of TVector;
  6.  
  7.  
  8. function mtx_cholesky (const a:TMatrix):TMatrix;
  9. var l : TMatrix;
  10.     c : float;
  11. begin
  12.   c := 3;
  13.   c := sqrt(c); //-> invalid combination of opcode and operand
  14.   SetLength (l,3,3);
  15.   l[0,0]:=c;
  16.   result:=l;
  17. end;
  18.  
  19. begin
  20. end.
  21.  
  22.  
« Last Edit: July 11, 2018, 06:53:42 pm by Nitorami »

ASerge

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Confirm.
It is interesting that if you add the generation of asm code (-al), then everything passes.
Code: ASM  [Select][+][-]
  1. ...
  2. # [12] c := 3;
  3.         vmovss  _$PROGRAM$_Ld1,%xmm0
  4.         movss   %xmm0,-56(%ebp)
  5. # [13] c := sqrt(c); //-> invalid combination of opcode and operand
  6.         vsqrtss -56(%ebp),%xmm0,%xmm0
  7.         vmovss  %xmm0,-56(%ebp)
  8. ...

Nitorami

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Indeed, very odd. I will file a bug report.

marcov

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Did you try -CfAVX ?

Seems a bit strange to allow AVX instructions, but not for the CPU?

Nitorami

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  • Posts: 481
Yes, same behaviour.

 

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